STK14C88-3 Просмотр технического описания (PDF) - Cypress Semiconductor
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STK14C88-3 Datasheet PDF : 17 Pages
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STK14C88-3
AutoStore or Power Up RECALL
Parameter
tHRECALL [15]
tSTORE [16, 17]
tVSBL[16]
VRESET
VSWITCH
tDELAY[16]
Alt
tRESTORE
tHLHZ
tBLQZ
Description
Power up RECALL Duration
STORE Cycle Duration
Low Voltage Trigger (VSWITCH) to HSB low
Low Voltage Reset Level
Low Voltage Trigger Level
Time Allowed to Complete SRAM Cycle
STK14C88-3
Min
Max
550
10
300
2.4
2.7
2.95
1
Unit
μs
ms
ns
V
V
μs
Switching Waveforms
Figure 11. AutoStore/Power Up RECALL
WE
Notes
15. tHRECALL starts from the time VCC rises above VSWITCH.
16. CE and OE low and WE high for output behavior.
17. HSB is asserted low for 1us when VCAP drops through VSWITCH. If an SRAM WRITE has not taken place since the last nonvolatile cycle, HSB will be released and no
store will take place.
Document Number: 001-50592 Rev. **
Page 11 of 17
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