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ML4865

High Voltage High Current Boost Regulator

Fairchild Semiconductor 

PRODUCT SPECIFICATION

ML4865

The output capacitor’s Equivalent Series Resistance (ESR)

and Equivalent Series Inductance (ESL), also contribute to

the ripple. Just after the NMOS transistor, Q1, turns off, the

current in the output capacitor ramps quickly to between

0.5A and 1.5A. This fast change in current through the

capacitor’s ESL causes a high frequency (5ns) spike to

appear on the output. After the ESL spike settles, the output

still has a ripple component equal to the inductor discharge

current times the ESR. To minimize these effects, choose an

output capacitor with less than 10nH of ESL and 200mΩ of

ESR.

Suitable tantalum capacitors can be obtained from the fol-

lowing vendors:

AVX

TPS Series (207) 282-5111

Sprague

593D Series (207) 324-4140

Kemet

T495 Series (864) 963-6300

Input Capacitor

Due to the high input current drawn at startup and possibly

during operation, it is recommended to decouple the input

with a capacitor with a value of 22µF to 68µF. This filtering

prevents the input ripple from affecting the ML4865 control

circuitry, and also improves the efficiency by reducing the I

squared R losses during the charge cycle of the inductor.

Again, a low ESR capacitor (such as tantalum) is recom-

mended.

It is also recommended that low source impedance batteries

be used. Otherwise, the voltage drop across the source

impedance during high input current situations will cause the

ML4865 to fail to start-up or to operate unreliably. In gen-

eral, for two cell applications the source impedance should

be less than 200mΩ, which means that small alkaline cells

should be avoided.

Shutdown

The SHDN pin is a high impedance input and is noise

sensitive. Either drive the SHDN input from a low imped-

ance source or bypass the pin to GND with a 10nF ceramic

capacitor.

Sense

The SENSE pin should be left open or bypassed to ground

for normal operation. The output can be set to voltages lower

than the preset value by adding a resistor divider. The output

voltage can be determined from the following equation:

VOUT

= 2.42 ×

R1 + R2

R2

(V)

(3)

where R1 and R2 are connected as shown in Figure 2. The

value of R2 should be 1MΩ or less to minimize bias current

errors. Choose an appropriate value of R2 and calculate the

value of R1.

R1 = R2 × VOUT − 1 (Ω)

(4)

2.42

External Schottky Rectifier

Due to excessive power dissipation, an external Schottky

rectifier is required when operating at input voltages above

6V. Even for applications where the input voltage is below

6V, the use of an external rectifier may be necessary to

achive efficiency or output current requirements.

If an external Schottky is required, look for a device with a

voltage rating of 20V or greater. The average forward current

rating should be at least 500mA, and the forward voltage

should be 600mV or less. Suitable Schottky rectifiers can be

obtained from Fairchild Semiconductor.

Layout

Good layout practices will ensure the proper operation of the

ML4865. Some layout guidelines follow:

• Use adequate ground and power traces or planes

• Keep components as close as possible to the ML4865

• Use short trace lengths from the inductor to the VL1 and

VL2 pins and from the output capacitor to the VOUT pin

• Use a single point ground for the ML4865 ground pin, and

the input and output capacitors

• Separate the ground for the converter circuitry from the

ground of the load circuitry and connect at a single point

A sample layout is shown in Figure 8.

Figure 8. Sample ML4865 Layout

REV. 1.0.2 8/10/01

7

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