ML145502, ML145503, ML145505
LANSDALE Semiconductor, Inc.
ANALOG ELECTRICAL CHARACTERISTICS (VDD = – VSS = 5 V to 6 V 5%, TA = – 40 to + 85°C)
Characteristic
Symbol
Min
Typ
Input Current
+Tx, –Tx
Iin
—
± 0.01
AC Input Impedance to VAG (1 kHz)
+Tx, –Tx
Zin
5
10
Input Capacitance
+Tx, –Tx
Input Offset Voltage of Txl Op Amp
Input Common Mode Voltage Range
+Tx, –Tx
Input Common Mode Rejection Ratio
+Tx, –Tx
Txl Unity Gain Bandwidth
RL ≥ 10 kΩ
Txl Open Loop Gain
RL ≥ 10 kΩ
Equivalent Input Noise (C–Message) Between +Tx and –Tx, at Txl
Output Load Capacitance for Txl Op Amp
Output Voltage Range Txl Op Amp, RxO or RxO
RL = 10 kΩ to VAG
RL = 600 Ω to VAG
Output Current Txl, RxO, RxO
Output Impedance RxO, RxO*
VSS + 1.5 V ≤ Vout ≤ VDD – 1.5 V
0 to 3.4 kHz
Output Load Capacitance for RxO and RxO*
Output dc Offset Voltage Referenced to VAG Pin
RxO
RxO*
Internal Gainsetting Resistors for RxG to RxO and RxO
External Reference Voltage Applied to Vref (Referenced to VAG)
Vref Input Current
VAG Output Bias Voltage
VICR
CMRR
BWp
AVOL
Vout
Zout
VAG Output Current
Source
Sink
Output Leakage Current During Power Down for the Txl Op Amp, VAG,
RxO, and RxO
Positive Power Supply Rejection Ratio,
0 – 100 kHz @ 250 mV, C–Message Weighting
Transmit
Receive
Negative Power Supply Rejection Ratio,
0 – 100 kHz @ 250 mV, C–Message Weighting
Transmit
Receive
* Assumes that RxG is not connected for gain modifications to RxO.
IVAG
—
—
VSS + 1.0
—
—
—
—
0
—
< ± 30
—
70
1000
75
– 20
—
VSS + 0.8
—
VSS + 1.5
—
± 5.5
—
—
3
0
—
—
—
—
—
62
100
0.5
—
—
—
—
0.53 VDD +
0.47 VSS
0.4
—
10.0
—
—
—
45
50
55
65
50
55
50
60
Max
± 0.2
—
—
10
—
VDD – 2.0
—
—
—
—
100
VDD – 1.0
VDD – 1.5
—
—
200
± 100
± 150
225
VDD – 1.0
20
—
0.8
—
± 30
—
—
—
—
Unit
µA
MΩ
pF
mV
V
dB
kHz
dB
dBrnC0
pF
V
mA
Ω
pF
mV
kΩ
V
µA
V
mA
µA
dBC
dBC
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