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ML145505

PCM Codec–Filter Mono–Circuit

LANSDALE Semiconductor Inc. 

ML145502, ML145503, ML145505

LANSDALE Semiconductor, Inc.

RxO, RxO

Receive Analog Outputs

These two complimentary outputs are generated from the out-

put of the receive filter. They are equal in magnitude and out of

phase. The maximum signal output of each is equal to the maxi-

mum peak–to–peak signal described with the reference. If a

3.15 V reference is used with RSI tied to VAG and a + 3 dBm0

sine wave is decoded, the RxO output will be a 6.3 V

peak–to–peak signal. RxO will also have an inverted signal out-

put of 6.3 V peak–to–peak. External loads may be connected

from RxO to RxO for a 6 dB push–pull signal gain or from

either RxO or RxO to VAG. With a 3.15 V reference each output

will drive 600 Ω to + 9 dBm. With RSI tied to VDD, each out-

put will drive 900 Ω to + 9 dBm.

RxG

Receive Output Gain Adjust (ML145502 Only)

The purpose of the RxG pin is to allow external gain adjust-

ment for the RxO pin. If RxG is left open, then the output signal

at RxO will be inverted and output at RxO. Thus the push–pull

gain to a load from RxO to RxO is two times the output level at

RxO. If external resistors are applied from RxO to RxG (RI)

and from RxG to RxO (RG), the gain of RxO can be set differ-

ently from inverting unity. These resistors should be in the range

of 10 kΩ. The RxO output level is unchanged by the resistors

and the RxO gain is approximately equal to minus RG/RI. The

actual gain is determined by taking into account the internal

resistors which will be in parallel to these external resistors. The

internal resistors have a large tolerance, but they match each

other very closely. This matching tends to minimize the effects

of their tolerance on external gain configurations. The circuit for

RxG and RxO is shown in the block diagram.

Txl

Transmit Analog Input

TxI is the input to the transmit filter. It is also the output of

the transmit gain amplifiers of the ML145502/03/05. The TxI

input has an internal gain of 1.0, such that a +3 dBm0 signal at

TxI corresponds to the peak converter reference voltage as

described in the Vref and RSI pin descriptions. For 3.15 V refer-

ence, the + 3 dBm0 input should be 6.3 V peak–to–peak.

+Tx/–Tx

Positive Tx Amplifier Input

Negative Tx Amplifier Input

The Txl pin is the input to the transmit band–pass filter. If

+Tx or –Tx is available, then there is an internal amplifier pre-

ceding the filter whose pins are +Tx, –Tx, and TxI. These pins

allow access to the amplifier terminals to tailor the input gain

with external resistors. The resistors should be in the range of

10 kΩ. If +Tx is not available, it is internally tied to VAG. If

–Tx and +Tx are not available, the TxI is a unity gain

high–impedance input.

POWER SUPPLIES

VDD

Most Positive Power Supply

VDD is typically 5 to 12 V.

VSS

Most Negative Power Supply

VSS is typically 10 to 12 V negative of VDD.

For a ±5 V dual–supply system, the typical power supply con-

figuration is VDD = + 5 V, VSS = – 5 V, VLS = 0 V (digital

ground accommodating TTL logic levels), and VAG = 0 V being

tied to system analog ground.

For single–supply applications, typical power supply configu-

rations include:

VDD = 10 V to 12 V

VSS = 0 V

VAG generates a mid supply voltage for referencing all analog

signals.

VLS controls the logic levels. This pin should be connected to

VDD for CMOS logic levels from VSS to VDD. This pin should

be connected to digital ground for true TTL logic levels refer-

enced to VLS.

TESTING CONSIDERATIONS (ML145502 ONLY)

An analog test mode is activated by connecting MSI and CCI

to 128 kHz. In this mode, the input of the A/D (the output of the

Tx filter) is available at the PDI pin. This input is direct coupled

to the A/D side of the codec. The A/D is a differential design.

This results in the gain of this input being effectively attenuated

by half. If monitored with a high–impedance buffer, the output

of the Tx low–pass filter can also be measured at the PDI pin.

This test mode allows independent evaluation of the transmit

low–pass filter and A/D side of the codec. The transmit and

receive channels of these devices are tested with the codec–filter

fully functional.

Page 11 of 26

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