M66310FP Просмотр технического описания (PDF) - Renesas Electronics
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M66310FP Datasheet PDF : 10 Pages
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M66310P/FP
Logic Diagram
Parallel data outputs
QA QB QC QD QE QF QG QH QI QJ QK QL QM QN QO QP
1
2 24 23 22 21 20 19 18 17 16 15 14 13 11 12
Serial data
output
SQP VCC
10
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
DRDRDRD RDRDRDRDRDRDRD RDRDRDRDRDR
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
DRDRDRD RDRDRDRDRDRDRD RDRDRDRDRDR
5
4
OE A
Enable Serial
input data
input
VCC
Parallel
data output
VCC
Serial data
output
Output format
8
7
69
CKS R CKL GND
Shift Direct Latch
clock reset clock
input input input
Pin Arrangement
M66310P/FP
Parallel data
outputs
QA ← 1
QB ← 2
VCC 3
Serial data input A → 4
Enable input OE → 5
Latch clock input CKL → 6
Direct reset input R → 7
Shift clock input CKS → 8
GND 9
Serial data output SQP ← 10
Parallel data QO ← 11
outputs
QP ← 12
QA
QC
QB
QD
QE
A
QF
OE QG
CKL QH
R
QI
CKS QJ
QK
SQP QL
QO QM
QP
QN
24 → QC
23 → QD
22 → QE
21 → QF
20 → QG
19 → QH
18 → QI
17 → QJ
16 → QK
15 → QL
14 → QM
13 → QN
Parallel data
outputs
(Top view)
Outline: PRDP0024AA-A (24P4D)
(24P2N-B)
REJ03F0176-0201 Rev.2.01 Mar 31, 2008
Page 2 of 9
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