M65761FP Просмотр технического описания (PDF) - Renesas Electronics

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M65761FP

QM-Coder

Renesas Electronics 

M65761FP

d6 (LI):

d7 (TP):

Line memory initialization is prohibited. (0: Initialization specified, 1: Initialization prohibited)

When a command to start processing coding/decoding of the first stripe is issued, if L1 = 1, the

initialization of the internal line memory is prohibited. (The last image data of the immediately prior

coding/decoding left in the line memory is used as the leading reference line data of the next

coding/decoding.) When LI = 0, the internal line memory is initialized. (All white (0) data is used as the

leading reference line data of the next coding/decoding.) In case when the previous stripe ended with

SDNORM during coding/decoding of multi-stripe by setting this bit in the initialization prohibit (1).

Note: Even when LI = 1 is set, this LI bit is cleared (0) and the internal line memory will be initialized

the same line due to the fact that the H/W reset is written into the external reset terminal or the

system set up register.

This selects the typical prediction when coding and decoding. (0: Typical prediction OFF, 1: Typical

prediction ON)

Initialization of Register

Each register is initialized as shown in the table below by writing H/W reset to the external RESET terminals or the

system set up registers.

Table 4 Initialization Values for Registers

Registers

System set up

Initialization Values

00h Note

Parameter set up

00h

Command

00h

Status

00h

Interrupt enable

00h

Number of pixels set up

00h

Set up number of lines

00h

Number of lines processed

00h

Data buffer

Indefinite

Marker code set up

00h

Marker code read out

00h

Various functions set up

00h

Note: When writing H/W RESET into the System Setup Register, the value written into is set up in the System Setup

Register.

REJ03F0234-0200 Rev.2.00 Sep 14, 2007

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