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ADP3421

Geyserville-Enabled DC-DC Converter Controller for Mobile CPUs

Analog Devices 

ADP3421

Parameter

Symbol

Conditions

Min

Typ Max

CURRENT LIMIT COMPARATOR

Input Offset Voltage

Input Bias Current

Hysteresis Current

VCLOS

ICL+

ICL–

Hysteresis Setting Reference Voltage VVHYS

Propagation Delay Time6

tCLPD7

VCS– = 1.3 V

VCS+ = 1.3 V

VCORE = VRAMP = 1.3 V

VREG = 1.28 V, VCS– = 1.3 V

VCS+ = 1.28 V

RIHYS Open

RIHYS = 170 kΩ

RIHYS = 17 kΩ

VCS+ = 1.32 V

RIHYS Open

RIHYS = 170 kΩ

RIHYS = 17 kΩ

TA = 25°C

0°C ≤ TA ≤ 100°C

–6

–5

–22

–265

–13

–175

1.53

+6

+5

–30

–300

–5

–38

–335

–20

–200

1.70

30

50

–5

–27

–225

1.87

60

100

LINEAR REGULATOR SOFT-START TIMER

Charge Current

Discharge Current

Enable Threshold

Termination Threshold

ISSC(UP)

ISSC(DN)

VSSCEN4

VSSCTH

VSSC = 0 V

VSSC = 1.7 V, VUVLO = 1.1 V

–0.6

0.3

1.53

–1.0 –1.4

1.0

150 400

1.70 1.87

2.5 V CLK LDO CONTROLLER

Feedback Bias Current

Output Drive Current

DC Transconductance

ICLKFB

ICLKDRV

GCLK

VCLKFB = 2.5 V

VCLKDRV = 2.55 V

VCLKDRV = 2.45 V

∆ICLKDRV = 1 mA

12.5 25

1

3

20

500

1.5 V I/O LDO CONTROLLER

Feedback Bias Current

Output Drive Current

DC Transconductance

IIOFB

IIODRV

GIO

VIOFB = 1.5 V

VIODRV = 1.53 V

VIODRV = 1.47 V

∆ICLKDRV = 1 mA

7.5 15

1

10

60

650

LEVEL TRANSLATOR

Input Clamping Threshold

Output Voltage

Propagation Delay Time6

VLTIH

VLTOH

VLTOL

tLTPD

ILTI = –10 µA

ILTI = –10 µA9

VLTI = 0.175 V9

0.95

0.9 × VCCLT

1.5

VCCLT

375

10

NOTES

1VCORE ramps up monotonically.

2VCORE ramps down monotonically.

3During latency time of VID code change, the Power Good output signal should not be considered valid.

4Internal bias and soft start are not enabled unless the soft-start pin voltage first drops below the enable threshold.

5Measured from 50% of VID code transient amplitude to the point where V DAC settles within ± 1% of its steady state value.

6Guaranteed by characterization.

740 mV p-p amplitude impulse with 20 mV overdrive. Measure from the input threshold intercept point to 50% of the output voltage swing.

8Measured between the 30% and 70% points of the output voltage swing.

9The LTO output tied to VCCLT = 2.5 V rail through an RLTO = 150 Ω pull-up resistor.

Specifications subject to change without notice.

Unit

mV

µA

µA

µA

µA

µA

µA

µA

V

ns

ns

µA

mA

mV

V

µA

µA

mA

mA/V

µA

µA

mA

mA/V

V

V

mV

ns

REV. A

–3–

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