iP2003APbF
All specifications @25°C (unless otherwise specified)
Absolute Maximum Ratings:
Parameter
Symbol Min
VIN to PGND
VIN
-
VDD to PGND
VDD
-
PWM to PGND
PWM
-0.3
Enable to PGND
ENABLE -0.3
Output RMS Current
IOUT
-
Typ Max Units
Conditions
-
16
V
-
6.0
V
- VDD +0.3 V Not to exceed 6.0V
- VDD +0.3 V Not to exceed 6.0V
-
40
A Measured at VSW
Recommended Operating Conditions:
Parameter
Symbol Min Typ Max Units
Supply Voltage
VDD
4.6
5.0
5.5
V
Input Voltage
VIN
3.0
-
13.2
V
Output Voltage
VOUT
0.8
-
3.3
V
Output Current
IOUT
-
-
40
A
Operating Frequency
fsw
300
-
1000 kHz
Operating Duty Cycle
D
-
-
85
%
Block Temperature
TBLK
-40
-
125
°C
Conditions
Electrical Specifications @ VDD = 5V (unless otherwise specified):
Parameter
Symbol Min Typ Max Units
Conditions
Block Power Loss c
PLOSS
-
9.4 11.7
W
VIN=12V, VOUT=1.3V
Turn On Delay d
Turn Off Delay d
td(on)
td(off)
-
63
-
IOUT=40A, fSW=1MHz
ns
-
26
-
L = 0.3µH
VIN Quiescent Current
VDD Quiescent Current
IQ-VIN
-
-
1.0
mA Enable = 0V, VIN=12V
IQ-VDD
-
10
-
µA Enable = 0V, VDD=5V
Under-Voltage Lockout
UVLO
Start Threshold
VSTART
4.2
4.4
4.5
V
Hysteresis
VHvs-UVLO
-
150
-
mV
Enable
ENABLE
Input Voltage High
VIH
2.1
-
-
V
Input Voltage Low
VIL
-
-
0.8
Power Ready
PRDY
Logic Level High
Logic Level Low
VOH
VOL
4.5
4.6
-
-
0.1
0.2
V
VDD=4.6V, ILoad=10mA
VDD <UVLO Threshold, ILoad = 1mA
PWM Input
PWM
Logic Level High
VOH
2.1
-
-
V
Logic Level Low
VOL
-
-
0.8
Measurement made using six 10uF (TDK C3225X5R1C106KT or equiv.) capacitors across the input (see
Fig. 8).
Not associated with the rise and fall times. Does not affect Power Loss (see Fig. 9).
2
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