AV9248-90 Просмотр технического описания (PDF) - Integrated Circuit Systems
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AV9248-90 Datasheet PDF : 16 Pages
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Byte 1: CPU, Active/Inactive Register (1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
-
-
40
-
43
44
PWD
X
X
1
1
1
1
1
1
Description
Latched FS2#
Latched FS4#
(Reserved)
(Reserved)
SDRAM12 (Act/Inact)
(Reserved)
CPUCLK1 (Act/Inact)
CPUCLK_F (Act/Inact)
Byte 2: PCI Active/Inactive Register (1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
7
-
14
12
11
10
8
PWD
1
1
1
1
1
1
1
1
Description
(Reserved)
PCICLK_F (Act/Inact)
(Reserved)
PCICLK4 (Act/Inact)
PCICLK3 (Act/Inact)
PCICLK2 (Act/Inact)
PCICLK1 (Act/Inact)
PCICLK0 (Act/Inact)
ICS9248 - 90
Byte 3: SDRAM Active/Inactive Register (1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
26
25
-
21,20,18,17
32,31,29,28
38,37,35,34
PWD
X
X
1
1
1
1
1
1
Description
MODE#
Latched FS0#
48MHz (Act/Inact)
24 MHz (Act/Inact)
(Reserved)
SDRAM (8:11) (Active/Inactive)
SDRAM (4:7) (Active/Inactive)
SDRAM (0:3) (Active/Inactive)
Notes:
1. Inactive means outputs are held LOW and are disabled from switching.
2. Latched Frequency Selects (FS#) will be inverted logic load of the input frequency select pin conditions.
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