HD74LVC125ATELL Просмотр технического описания (PDF) - Renesas Electronics

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HD74LVC125ATELL

Quad. Bus Buffer Gates with 3-state Outputs

Renesas Electronics 

HD74LVC125A

Switching Characteristics

Ta = –40 to 85°C

Item

Symbol VCC (V) Min

Typ

Max

Propagation delay time

tPLH

2.7

—

—

6.5

tPHL

3.3±0.3 1.5

—

6.0

5.0±0.5 —

—

5.0

Output enable time

tZH

2.7

—

—

8.0

tZL

3.3±0.3 1.5

—

7.0

5.0±0.5 —

—

6.0

Output disable time

tHZ

2.7

—

—

6.5

tLZ

3.3±0.3 1.5

—

5.5

5.0±0.5 —

—

4.5

Between output pins skew *1 tOSLH

2.7

—

—

—

tOSHL

3.3±0.3 —

—

1.0

5.0±0.5 —

—

1.0

Input capacitance

CIN

2.7

—

3.0

—

Output capacitance

CO

2.7

—

15.0

—

Note: 1. This parameter is characterized but not tested.

tosLH = | tPLHm - tPLHn|, tosHL = | tPHLm - tPHLn|

Unit

ns

ns

ns

ns

pF

pF

Test Circuit

VCC

VCC

From

(Input)

A

To

(Output)

Y

C

Y

C

Y

Input

Pulse Generator

Zout = 50 Ω

Output

500 Ω S1

CL =

450 Ω

50 pF 50 Ω Scope

OPEN

*1 See under table

GND

Note: 1. CL includes probe and jig capacitance.

Symbol

tPLH / t PHL

tZH/ t HZ

tZL / t LZ

S1

Vcc=2.7V,

3.3±0.3V

Vcc=5.0±0.5V

OPEN OPEN

GND

GND

6V

2×Vcc

Rev.4.00 Jul. 23, 2004 page 4 of 6

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