HD74LV74ARPEL Просмотр технического описания (PDF) - Renesas Electronics

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HD74LV74ARPEL

Dual D–type Flip Flops with Preset and Clear

Renesas Electronics 

HD74LV74A

Pin Arrangement

1CLR 1

1D 2

1CLK 3

1PRE 4

1Q 5

1Q 6

GND 7

(Top view)

14 VCC

13 2CLR

12 2D

11 2CLK

10 2PRE

9 2Q

8 2Q

Absolute Maximum Ratings

Item

Symbol

Ratings

Unit

Conditions

Supply voltage range

VCC

Input voltage range*1

VI

Output voltage range*1, 2

VO

Input clamp current

Output clamp current

Continuous output current

Continuous current through

VCC or GND

Maximum power dissipation at

Ta = 25°C (in still air)*3

IIK

IOK

IO

ICC or IGND

PT

–0.5 to 7.0

–0.5 to 7.0

–0.5 to VCC + 0.5

–0.5 to 7.0

–20

±50

±25

±50

785

500

V

V

V

Output: H or L

VCC: OFF

mA

VI < 0

mA

VO < 0 or VO > VCC

mA

VO = 0 to VCC

mA

mW

SOP

TSSOP

Storage temperature

Tstg

–65 to 150

°C

Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of

which may be realized at the same time.

1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are

observed.

2. This value is limited to 5.5 V maximum.

3. The maximum package power dissipation was calculated using a junction temperature of 150°C.

Rev.3.00 Jun. 02, 2004 page 2 of 9

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