HD74LV161AFPEL Просмотр технического описания (PDF) - Renesas Electronics

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HD74LV161AFPEL

Synchronous 4-bit Binary Counter (Synchronous Clear)

Renesas Electronics 

HD74LV161A

Waveform − 5

Cascade mode

(Set to maximum count number)

ENT

50%VCC

50%VCC

VCC

GND

CARRY

50%VCC

VOH

50%VCC

tpLH

tpHL

VOL

Note: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, t r≤ 3 ns, t f ≤ 3 ns

Application

Cascade circuitry

H: COUNT

L: DISABLE

INPUTS

H: COUNT

L: DISABLE

CLR

CLK

LD A B C D

ENP

ENT

CK

CARRY

CLR QA QB QC QD

OUTPUT

INPUTS

LD A B C D

ENP

ENT

CK

CARRY

CLR QA QB QC QD

OUTPUT

INPUTS

LD A B C D

ENP

ENT

CK

CARRY

CLR QA QB QC QD

OUTPUT

to next stages

Rev.4.00 Jun. 04, 2004 page 13 of 15

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