MBM30LV0064-PFTN Просмотр технического описания (PDF) - Fujitsu

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MBM30LV0064-PFTN

FLASH MEMORY CMOS 64M (8M × 8) BIT NAND-type

Fujitsu 

MBM30LV0064

Read (3): 50h

The Read (3) mode has identical timing to that of Read (1) and (2). However, while Read (1) and (2) are used

to access the array, Read (3) is used to access the 16 byte spare area. When the 50h command is executed,

the pointer will be set to an address space between columns 512 and 527. The values of Y will complete the

address decoding. During this operation, only address bits A3 to A0 are used to determine the starting column

address; A7 to A4 are ignored. A22 to A9 are used to determine the starting row address.

CE

CLE

ALE

WE

RE

R/B

I/O0

to I/O7 Command 50h

Page (Row)

Address X

Starting Address

YXX

0

255 511 527

Data Output

Y (Column Address)

Figure 3 Read Mode (3) Operation

Sequential Read

Each RE pulse used to output data from the data register will cause the column address pointer to increment

by one. When the final column has been reached, the next page will be automatically loaded into the data register.

The R/B signal may be used to monitor the completion of the data transfer.

R/B

I/O0 to I/O7

0

00h/01h/50h Address Input Data

255 511 527 0 255 511 527 0

Data

255 511 527 0

Data

255 511 527

00h, SE=L

01h, SE=L

00h, SE=H

Figure 4 Sequential Read

50h, SE=L

10

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