CY62147CV30LL-55BAI Просмотр технического описания (PDF) - Cypress Semiconductor

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CY62147CV30LL-55BAI

256K x 16 Static RAM

Cypress Semiconductor 

CY62147CV25/30/33

MoBL™

AC Test Loads and Waveforms

R1

VCC

OUTPUT

30 pF

INCLUDING

JIG AND

SCOPE

ALL INPUT PULSES

VCC Typ

10%

90%

R2

GND

Rise TIme: 1 V/ns

90%

10%

Fall Time: 1 V/ns

Equivalent to:

THÉVENIN EQUIVALENT

OUTPUT

RTH

VTH

Parameters

R1

R2

RTH

VTH

2.5V

16.6

15.4

8

1.20

3.0V

1.105

1.550

0.645

1.75

Data Retention Characteristics (Over the Operating Range)

Parameter

VDR

ICCDR

tCDR[5]

tR[6]

Description

VCC for Data Retention

Data Retention Current

Chip Deselect to Data

Retention Time

Operation Recovery Time

Conditions

VCC= 1.5V

CE > VCC – 0.2V,

VIN > VCC – 0.2V or VIN < 0.2V

3.3V

1.216

1.374

0.645

1.75

Unit

KΩ

KΩ

KΩ

Volts

Min.

1.5

Typ.[4]

3

Max.

Vccmax

10

Unit

V

µA

0

ns

tRC

ns

Data Retention Waveform[7]

VCC

CE or

BHE.BLE

VCC(min)

tCDR

DATA RETENTION MODE

VDR > 1.5 V

VCC(min)

tR

Note:

6. Full Device AC operation requires linear VCC ramp from VDR to VCC(min.) > 100µs or stable at VCC(min.) >100 µs.

7. BHE.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE.

Document #: 38-05202 Rev. *A

Page 5 of 14

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