CY62146CV30 Просмотр технического описания (PDF) - Cypress Semiconductor

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CY62146CV30

256K x 16 Static RAM

Cypress Semiconductor 

Switching Waveforms (continued)

[11, 15, 16]

Write Cycle 1 (WE Controlled)

ADDRESS

CE

tSA

WE

BHE/BLE

tWC

tSCE

tAW

tPWE

tBW

CY62146CV30 MoBL™

tHA

OE

DATA I/O

NOTE 17

tHZOE

Write Cycle 2 (CE Controlled) [11, 15, 16]

ADDRESS

CE

WE

tSA

tAW

tSD

DATAIN VALID

tWC

tSCE

tPWE

BHE/BLE

tBW

tHD

tHA

OE

DATA I/O

NOTE 17

tHZOE

tSD

tHD

DATAIN VALID

Notes:

15. Data I/O is high-impedance if OE = VIH.

16. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.

17. During this period, the I/Os are in output state and input signals should not be applied.

Document #: 38-05203 Rev. **

Page 7 of 12

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