CS51021ED16 Просмотр технического описания (PDF) - Cherry semiconductor
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CS51021ED16 Datasheet PDF : 9 Pages
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Circuit Description: continued
timing capacitor’s discharge current is trimmed, the maxi-
mum duty cycle is well defined. It is determined by the
ratio between the timing resistor RT and the timing capaci-
tor CT. Refer to figures 5 and 6 to select appropriate values
for RT and CT.
1
fSW = TSW ; TSW = tCH + tDIS
2500
1
2000
1500
2
1000
3
1. CT = 47pF
2. CT = 100pF
3. CT = 150pF
4. CT = 220pF
5. CT = 390pF
6. CT = 470pF
7. CT = 560pF
8. CT = 680pF
4
500
5
6
8
7
0
5
10
15
20
25
30
35
40
45
50
RT (kΩ)
Figure 5: Frequency vs. RT for Discrete Capacitor Values.
100
7
8
6
90
5
80
4
3
2
70
1
60
1. CT = 47pF
2. CT = 100pF
3. CT = 150pF
4. CT = 220pF
5. CT = 390pF
6. CT = 470pF
7. CT = 560pF
8. CT = 680pF
50
40
5 10 15
20 25 30
35
40
45
50
55
RT (kΩ)
Figure 6: Duty Cycle vs. RT for Discrete Capacitor Values.
8
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