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74VHCT240A Просмотр технического описания (PDF) - STMicroelectronics

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74VHCT240A Datasheet PDF : 12 Pages
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74VHCT240A
OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (INVERTED)
s HIGH SPEED: tPD = 5.4 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA=25°C
s COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN.), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 240
s IMPROVED LATCH-UP IMMUNITY
s LOW NOISE: VOLP = 0.9V (MAX.)
DESCRIPTION
The 74VHCT240A is an advanced high-speed
CMOS OCTAL BUS BUFFER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS technology.
G enable input governs four BUS BUFFERs.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74VHCT240AMTR
74VHCT240ATTR
This device is designed to be used with 3 state
memory address drivers, etc.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V since all
inputs are equipped with TTL threshold.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
December 2004
Rev. 4
1/12

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