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74LVT534

3.3V Octal D-type flip-flop; inverting (3-State)

Philips Electronics 

Philips Semiconductors

3.3V Octal D-type flip-flop, inverting (3-State)

Product specification

74LVT534

FEATURES

• 3-State outputs for bus interfacing

• Common output enable

• TTL input and output switching levels

• Input and output interface capability to systems at 5V supply

• Bus-hold data inputs eliminate the need for external pull-up

resistors to hold unused inputs

• Live insertion/extraction permitted

• No bus current loading when output is tied to 5V bus

• Power-up 3-State

• Power-up reset

• Latch-up protection exceeds 500mA per JEDEC Std 17

• ESD protection exceeds 2000V per MIL STD 883 Method 3015

and 200V per Machine Model

DESCRIPTION

The LVT534 is a high-performance BiCMOS product designed for

VCC operation at 3.3V.

This device is an 8-bit, edge triggered register coupled to eight

3-State output buffers. The two sections of the device are controlled

independently by the clock (CP) and Output Enable (OE) control

gates. The state of each D input (one set-up time before the

Low-to-High clock transition) is transferred to the corresponding

flip-flop’s Q output.

The 3-State output buffers are designed to drive heavily loaded

3-State buses, MOS memories, or MOS microprocessors. The

active-Low Output Enable (OE) controls all eight 3-State buffers

independent of the clock operation.

When OE is Low, the stored data appears at the outputs. When OE

is High, the outputs are in the High-impedance “off” state, which

means they will neither drive nor load the bus.

QUICK REFERENCE DATA

SYMBOL

PARAMETER

tPLH

Propagation delay

tPHL

CP to Qn

CIN

Input capacitance

COUT

Output capacitance

ICCZ

Total supply current

CONDITIONS

Tamb = 25°C; GND = 0V

CL = 50pF;

VCC = 3.3V

VI = 0V or 3.0V

Outputs disabled;

VI/O = 0V or 3.0V

Outputs disabled;

VCC = 3.6V

TYPICAL

3.0

3.5

4

7

0.13

UNIT

ns

pF

pF

mA

ORDERING INFORMATION

PACKAGES

20-Pin Plastic SOL

20-Pin Plastic SSOP Type II

20-Pin Plastic TSSOP Type I

TEMPERATURE RANGE

–40°C to +85°C

–40°C to +85°C

–40°C to +85°C

OUTSIDE NORTH AMERICA

74LVT534 D

74LVT534 DB

74LVT534 PW

NORTH AMERICA

74LVT534 D

74LVT534 DB

74LVT534PW DH

DWG NUMBER

SOT163-1

SOT339-1

SOT360-1

PIN CONFIGURATION

LOGIC SYMBOL

OE 1

Q0 2

D0 3

D1 4

Q1 5

Q2 6

D2 7

D3 8

Q3 9

GND 10

20 VCC

19 Q7

18 D7

17 D6

16 Q6

15 Q5

14 D5

13 D4

12 Q4

11 CP

SA00161

3 4 7 8 13 14 17 18

D0 D1 D2 D3 D4 D5 D6 D7

11

CP

1

OE

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

2 5 6 9 12 15 16 19

SA00162

1998 Feb 19

2

853-1855 18988

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