16C450 Просмотр технического описания (PDF) - Exar Corporation

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16C450

UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART)

Exar Corporation 

ST16C450

SYMBOL DESCRIPTION

Symbol

A0

A1

A2

IOR

CS0

CS1

-CS2

IOW

-AS

D0-D7

GND

Rev. 4.20

Pin

Signal

40 44 48 type

Pin Description

28 31 28

I Address-0 Select Bit Internal registers address selection.

27 30 27

I Address-1 Select Bit Internal registers address selection.

26 29 26

I Address-2 Select Bit Internal registers address selection.

22 25 20

I Read data strobe. Its function is the same as -IOR (see -

IOR), except it is active high. Either an active -IOR or IOR

is required to transfer data from 16C450 to CPU during a

read operation.

12 14

9

I Chip Select-0. Logical 1 on this pin provides the chip select-

0 function.

13 15 10

I Chip Select-1. Logical 1 on this pin provides the chip select-

1 function.

14 16 11

I Chip Select -2. Logical 0 on this pin provides the chip select-

2 function.

19 21 17

I Write data strobe. Its function is the same as -IOW (see -

IOW), but it acts as an active high input signal. Either -IOW

or IOW is required to transfer data from the CPU to

ST16C450 during a write operation.

25 28 24

I Address Strobe. A logic 0 transition on -AS latches the state

of the chip selects and the register select bits, A0-A2. This

input is used when address and chip selects are not stable

for the duration of a read or write operation, i.e., a micropro-

cessor that needs to de-multiplex the address and data bits.

If not required, the -AS input can be permanently tied to a

logic 0 (it is edge triggered).

1-8 2-9 43-47

2-4 I/O Data Bus (Bi-directional) - These pins are the eight bit, tri-

state data bus for transferring information to or from the

controlling CPU. D0 is the least significant bit and the first

data bit in a transmit or receive serial data stream.

20 22 18 Pwr Signal and Power Ground.

4

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