DS80C390-QCR Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS80C390-QCR

Dual CAN High-Speed Microprocessor

Dallas Semiconductor -> Maxim Integrated 

www.dalsemi.com

PRELIMINARY

DS80C390

Dual CAN High-Speed

Microprocessor

FEATURES

§ 80C52 compatible

− 8051 instruction-set compatible

PIN ASSIGNMENT

48

33

− Four 8-bit I/O ports

49

32

− Three 16-bit timer/counters

− 256 bytes scratchpad RAM

§ High-Speed Architecture

− 4 clocks/machine cycle (8051=12)

DS80C390

− Runs DC to 40 MHz clock rates

− Frequency multiplier reduces EMI

− Single-cycle instruction in 100 ns

64

17

− 16/32-bit math coprocessor

§ 4 kB internal SRAM usable as

program/data/stack memory

§ Enhanced memory architecture

1

16

64-PIN QFP

− Addresses up to 4 MB external

− Defaults to true 8051 memory compatibility

9

1

61

− User-enabled 22-bit program/data counter

10

60

− 16-Bit/22-bit paged/22-bit contiguous

modes

− User-selectable multiplexed / non-

multiplexed memory interface

DS80C390

− Optional 10 bit stack pointer

§ Two full-function CAN 2.0B controllers

− 15 message centers per controller

26

44

− Standard 11-bit or extended 29-bit

identification modes

− Supports DeviceNet, SDS, and higher layer

27

43

68-PIN PLCC

CAN protocols

− Disables transmitter during autobaud

− SIESTA low power mode

§ Two full-duplex hardware serial ports

§ Programmable IrDA clock

§ High integration controller includes

− Power-fail reset

− Early-warning power-fail interrupt

− Programmable watchdog timer

− Oscillator-fail detection

§ 16 total interrupt sources with 6 external

§ Available in 64-pin QFP, 68-pin PLCC

1 of 58

110199

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