NXP Semiconductors
PTN3460
eDP to LVDS bridge IC
12. Characteristics
12.1 Device characteristics
Table 16. Device characteristics
Over operating free-air temperature range, unless otherwise noted.
Symbol
Parameter
Conditions
tstartup
start-up time
device start-up time from power-on and
RST_N = HIGH; supply voltage within
operating range to specified operating
characteristics
tw(rst)
td(rst)
td(pwrsave-act)
reset pulse width
reset delay time[1]
delay time from
power-save to active
device is supplied with valid supply voltage
device is supplied with valid supply voltage
time between PD_N going HIGH and HPD
raised HIGH by PTN3460; RST_N is HIGH.
Device is supplied with valid supply voltage.
[1] Time for device to be ready after rising edge of RST_N.
Min Typ Max Unit
-
-
90 ms
10 -
-
-
-
-
-
s
90 ms
90 ms
12.2 Power consumption
Table 17. Power consumption
At operating free-air temperature of 25 C and under nominal supply value (unless otherwise noted).
Symbol Parameter Conditions
Single supply mode
EPS_N = HIGH
or open
Dual supply mode Unit
EPS_N = LOW
Min Typ Max Min Typ Max
Pcons
power
consumption
Active mode;
1440 900 at 60 Hz;
24 bits per pixel; dual LVDS bus
[1] -
430
-
- 290 - mW
Active mode;
1600 900 at 60 Hz;
24 bits per pixel; dual LVDS bus
[1] -
448
-
- 305 - mW
Active mode;
1920 1200 at 60 Hz;
24-bits per pixel; dual LVDS bus
[1] -
570
-
- 380 - mW
D3 mode/Power-saving mode;
when PTN3460 is set to
Power-saving mode via
‘SET_POWER’ AUX command by
eDP source; AUX and HPDRX
circuitry are only kept active
-
27
-
-
15
- mW
Deep power-saving/Shutdown mode;
when PD_N is LOW and the device is
supplied with valid supply voltage
-
5
-
-
2
- mW
[1] For Active mode power consumption, LVDS output swing of 300 mV is considered.
PTN3460
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 12 March 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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