XRT91L32 Просмотр технического описания (PDF) - Exar Corporation

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XRT91L32

STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER

Exar Corporation 

XRT91L32

STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER

xr

REV. 1.0.2

NAME

NC

ALOOP

DLOOP

LEVEL

No Connect

LVTTL

LVTTL

TYPE

-

I

I

PIN

6,7,13, NOTE: No connect

14,16,26,

27,32,33,

50,52,57,

61,73,74,

77,78,79,

80,83,90,

96

DESCRIPTION

3

Analog Local Loopback

This loopback feature serializes the 8-bit parallel transmit data

input and presents the data to the transmit serial output and in

addition it also internally routes the serialized data back to the

Clock and Data Recovery block for serial to parallel conversion.

The received serial data input is ignored.

"Low" = Disabled

"High" = Analog Local Loopback Mode Enabled

100 DLOOP Local Loopback

This digital loopback mode interconnects the 8-bit parallel

transmit data input and TXCLK to the 8-bit parallel receive data

output and receive RXCLK respectively while maintaining the

transmit serial data output. If digital loopback is enabled, the

receive serial data input is ignored.

"Low" = Disabled

"High" = Digital Local Loopback Mode Enabled

NOTE: DLOOP and RLOOPS can be enabled simultaneously

to achieve a dual loopback diagnostic feature in normal

operation.

TRANSMITTER SECTION

NAME

LEVEL

TXDI0

TXDI1

TXDI2

TXDI3

TXDI4

TXDI5

TXDI6

TXDI7

LVTTL

TYPE

I

TXOP

TXON

LVPECL Diff O

PIN

DESCRIPTION

95 Transmit Parallel Data Input

94 Transmit Parallel Clock Output Operation

92 The 77.76 Mbps (STS-12/STM-4) / 19.44 Mbps (STS-3/STM-1)

91 8-bit parallel transmit data should be applied to the transmit

89

parallel bus and simultaneously referenced to the rising edge of

the TXPCLK_IO clock output. The 8-bit parallel interface is mul-

88

tiplexed into the transmit serial output interface with the MSB

86

first (TXDI[7:0]).

85

Alternate Transmit Parallel Clock Input Operation

When operating is this mode, TXPCLK_IO is no longer a paral-

lel clock output reference but reverses direction and serves as

the parallel transmit clock input reference for the PISO (Parallel

Input to Serial Output) block. The 77.76 Mbps (STS-12/STM-4)

/ 19.44 Mbps (STS-3/STM-1) 8-bit parallel transmit data should

be applied to the transmit parallel bus and simultaneously refer-

enced to the rising edge of the TXPCLK_IO clock input.

10 Transmit Serial Data Output

11 The transmit serial data stream is generated by multiplexing the

8-bit parallel transmit data input into a 622.08 Mbps STS-12/

STM-4 or 155.52 Mbps STS-3/STM-1 serial data stream.

6

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