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HFA3861B

Direct Sequence Spread Spectrum Baseband Processor

Intersil 

HFA3861B

DATA

802.11 DSSS BPSK

1Mbps

BARKER

IOUT

QOUT

CHIP

RATE

SYMBOL

RATE

1 BIT ENCODED TO

ONE OF 2 CODE

WORDS

(TRUE-INVERSE)

11 CHIPS

11 MC/S

1 MS/S

802.11 DSSS QPSK

2Mbps

BARKER

2 BITS ENCODED

TO ONE OF

4 CODE WORDS

11 CHIPS

11 MC/S

1 MS/S

5.5Mbps CCK

COMPLEX

SPREAD FUNCTIONS

11Mbps CCK

COMPLEX

SPREAD FUNCTIONS

4 BITS ENCODED

TO ONE OF 16

COMPLEX CCK

CODE WORDS

8 BITS ENCODED

TO ONE OF 256

COMPLEX CCK

CODE WORDS

8 CHIPS

11 MC/S

1.375 MS/S

8 CHIPS

11 MC/S

1.375 MS/S

I vs Q

FIGURE 7. MODULATION MODES

For the 1 and 2Mbps modes, the transmitter accepts data

from the external source, scrambles it, differentially encodes

it as either DBPSK or DQPSK, and spreads it with the BPSK

PN sequence. The baseband digital signals are then output

to the external IF modulator.

For the CCK modes, the transmitter inputs the data and

partitions it into nibbles (4 bits) or bytes (8 bits). At 5.5Mbps,

it uses two of those bits to select one of 4 complex spread

sequences from a table of CCK sequences and then QPSK

modulates that symbol with the remaining 2 bits. Thus, there

are 4 possible spread sequences to send at four possible

carrier phases, but only one is sent. This sequence is then

modulated on the I and Q outputs. The initial phase

reference for the data portion of the packet is the phase of

the last bit of the header. At 11Mbps, one byte is used as

above where 6 bits are used to select one of 64 spread

sequences for a symbol and the other 2 are used to QPSK

modulate that symbol. Thus, the total possible number of

combinations of sequence and carrier phases is 256. Of

these only one is sent.

The bit rate Table 3 shows examples of the bit rates and the

symbol rates and Figure 7 shows the modulation schemes.

The modulator is completely independent from the

demodulator, allowing the PRISM baseband processor to be

used in full duplex operation.

Header/Packet Description

The HFA3861B is designed to handle packetized Direct

Sequence Spread Spectrum (DSSS) data transmissions.

The HFA3861B generates its own preamble and header

information. It uses two packet preamble and header

configurations. The first is backwards compatible with the

existing IEEE 802.11-1997 1 and 2Mbps modes and the

second is the optional shortened mode which maximizes

throughput at the expense of compatibility with legacy

equipment.

In the long preamble mode, the device uses a

synchronization preamble of 128 symbols along with a

header that includes four fields. The preamble is all 1's

(before entering the scrambler) plus a start frame delimiter

(SFD). The actual transmitted pattern of the preamble is

randomized by the scrambler. The preamble is always

transmitted as a DBPSK waveform (1Mbps). The duration of

the long preamble and header is 192µs.

In the short preamble mode, the modem uses a

synchronization field of 56 zero symbols along with an SFD

transmitted at 1Mbps. The short header is transmitted at

2Mbps. The synchronization preamble is all 0’s to distinguish

it from the long header mode and the short preamble SFD is

the time reverse of the long preamble SFD. The duration of

the short preamble and header is 96µs.

9

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