5001ANZ Просмотр технического описания (PDF) - Intersil

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5001ANZ

CPU Supervisor

Intersil 

X5001

Figure 8. Read Nonvolatile Status (Option 1) (Used to determine end of Watchdog Timer store operation)

CS

SCK

SI

SO

01234567

RWDT

Instruction

Nonvolatile Write in Progress

SO HIGH During 1st Bit While

in the Nonvolatile Write Cycle

Figure 9. Read Nonvolatile Status (Option 2) (Used to determine end of Watchdog Timer store operation)

CS

SCK

SI

SO

01234567

RWDT

Instruction

Nonvolatile Write in Progress

SO HIGH During

Nonvolatile Write Cycle

10

FN8125.1

May 30, 2006

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