W48S8704H(1999) Просмотр технического описания (PDF) - Cypress Semiconductor
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W48S8704H Datasheet PDF : 21 Pages
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PRELIMINARY
W48S87-04
Absolute Maximum Ratings
Stresses greater than those listed in this table may cause per-
manent damage to the device. These represent a stress rating
only. Operation of the device at these or any other conditions
.
Parameter
Description
VDD, VIN
TSTG
TA
TB
ESDPROT
Voltage on any pin with respect to GND
Storage Temperature
Operating Temperature
Ambient Temperature under Bias
Input ESD Protection
above those specified in the operating sections of this specifi-
cation is not implied. Maximum conditions for extended peri-
ods may affect reliability.
Rating
Unit
–0.5 to +7.0
V
–65 to +150
°C
0 to +70
°C
–55 to +125
°C
2 (min.)
kV
Crystal Oscillator
Parameter
VTH
CLOAD
CIN,X1
Description
X1 Input Threshold Voltage[5]
Load Capacitance, Imposed on
External Crystal[6]
X1 Input Capacitance[7]
Test Condition
Pin X2 unconnected
Min.
Typ.
1.65
20
40
Max.
Unit
V
pF
pF
3.3V DC Electrical Characteristics (CPU3.3#_2.5 Input = 0)
TA = 0°C to +70°C, VDD1:3 = VDDL1:2 = 3.3V±5% (3.135–3.465V)
Parameter
Description
Test Condition
Min.
Typ.
Max.
Unit
Supply Current
IDD
Combined 3.3V Supply Current
CPU0:3 =66.8 MHz
Outputs Loaded[8]
160
mA
Logic Inputs (All referenced to VDDQ3 = 3.3V)
VIL
Input Low Voltage
VIH
Input High Voltage
IIL
Input Low Current[9]
IIH
Input High Current[9]
Clock Outputs
0.8
V
2.0
V
10
µA
10
µA
VOL
Output Low Voltage
IOL = 1 mA
VOH
Output High Voltage
IOH = –1 mA
IOL
Output Low Current
CPU0:3[10]
VOL = 1.5V
SDRAM0:11
50
mV
3.1
V
55
75
105
mA
80
110
155
PCI_F, PCI0:5
55
75
105
IOAPIC
100
135
190
REF0
60
75
90
REF1
45
60
75
48/24MHZ
55
75
105
Notes:
5. X1 input threshold voltage (typical) is VDD/2.
6. The W48S87-04 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal
is 20 pF; this includes typical stray capacitance of short PCB traces to crystal.
7. X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).
8. All clock outputs loaded with maximum lump capacitance test load specified in AC Electrical Characteristics section.
9. W48S87-04 logic inputs have internal pull-up devices.
10. CPU0:3 loaded by 60Ω, 6-inch long transmission lines ending with 20-pF capacitors.
14
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