W9812G6JH Просмотр технического описания (PDF) - Winbond

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W9812G6JH

2M X 4 BANKS X 16 BITS SDRAM

Winbond 

6. BLOCK DIAGRAM

CLK

CKE

CLOCK

BUFFER

CS

RAS

CAS

WE

COMMAND

DECODER

CONTROL

SIGNAL

GENERATOR

A10

MODE

A0

REGISTER

ADDRESS

BUFFER

A9

A11

BS0

BS1

REFRESH

COUNTER

COLUMN

COUNTER

COLUMN DECODER

R

O

W

D

E

CELL ARRAY

C

BANK #0

O

D

E

R

SENSE AMPLIFIER

DATA CONTROL

CIRCUIT

COLUMN DECODER

R

O

W

D CELL ARRAY

E

C

BANK #2

O

D

E

R

SENSE AMPLIFIER

W9812G6JH

COLUMN DECODER

R

O

W

D

E

CELL ARRAY

C

O

BANK #1

D

E

R

SENSE AMPLIFIER

DMn

DQ

BUFFER

DQ0

DQ15

UDQM

LDQM

COLUMN DECODER

R

O

W

D CELL ARRAY

E

C

BANK #3

O

D

E

R

SENSE AMPLIFIER

Note: The cell array configuration is 4096 * 512 * 16.

Publication Release Date: Jun. 25, 2013

-6-

Revision A06

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