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W83176G-735

3 DIMM DDR ZERO DELAY BUFFER

Winbond 

W83176R-735/W83176G-735

3 DIMM DDR ZERO DELAY BUFFER FOR SIS CHIPSET

7. SPECIFICATIONS

7.1 ABSOLUTE MAXIMUM RATINGS

Stresses greater than those listed in this table may cause permanent damage to the device.

Precautions should be taken to avoid application of any voltage higher than the maximum rated

voltages to this circuit. Maximum conditions for extended periods may affect reliability. Unused

inputs must always be tied to an appropriate logic voltage level (Ground or VDD).

SYMBOL

VDD , AVDD

TSTG

TB

TA

PARAMETER

Voltage on any pin with respect to GND

Storage Temperature

Ambient Temperature

Operating Temperature

RATING

- 0.5 V to + 3.6 V

- 65°C to + 150°C

- 55°C to + 125°C

0°C to + 70°C

7.2 AC CHARACTERISTICS

VDD = AVDD = 2.5V ( 5 % , TA = 0(C to +70(C, Test load = 10 pF

PARAMETER

Operating clock

frequency

SYMBOL

MIN TYP MAX

FIN

100

200

Input Clock Duty Cycle

Dtin

40

60

Dynamic Supply Current

Idd

300

Cycle to Cycle Jitter

C-Cjitter

200

Output to Output Skew

Tskew

100

Output clock Rise time

Tor

650

950

Output clock Fall time

Tof

650

950

Output clock Duty Cycle

Dtot

45

55

Output differential-pair

crossing voltag

Voc

(Vdd/2)- Vdd/ (Vdd/2)

0.2

2 + 0.2

UNITS

MHz

%

mA

ps

ps

ps

ps

%

V

TEST CONDITIONS

Fin=100 to 200Mhz

Fout=100 to

200Mhz

Fout=100 to

200Mhz

Fout=100 to

200Mhz

Fout=100 to

200Mhz

Fout=100 to

200Mhz

Fout=100 to

200Mhz

-6-

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