W83697UF Просмотр технического описания (PDF) - Winbond

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W83697UF

WINBOND LPC I/O

Winbond 

W83697UF/W83697UG

Pin description, continued

PIN DESCRIPTION

O24p3

3.3V output pin with 24 mA source-sink capability

OD12

Open-drain output pin with 12 mA sink capability

OD24

Open-drain output pin with 24 mA sink capability

OD12p3

3.3V open-drain output pin with 12 mA sink capability

INt

TTL level input pin

INtp3

3.3V TTL level input pin

INtd

TTL level input pin with internal pull down resistor

INtu

TTL level input pin with internal pull up resistor

INts

TTL level Schmitt-trigger input pin

INtsp3

3.3V TTL level Schmitt-trigger input pin

INc

CMOS level input pin

INcu

CMOS level input pin with internal pull up resistor

INcd

CMOS level input pin with internal pull down resistor

INcs

CMOS level Schmitt-trigger input pin

INcsu

CMOS level Schmitt-trigger input pin with internal pull up resistor

5.1 LPC Interface

SYMBOL

CLKIN

PME#

PCICLK

LDRQ#

SERIRQ

LAD[3:0]

LFRAME#

LRESET#

PIN

17

98

19

20

21

23-26

27

28

I/O

INtp3

OD12p3

INtsp3

O12p3

I/O12tp3

I/O12tp3

INtsp3

INtsp3

FUNCTION

System clock input. According to the input frequency 24MHz or

48MHz, it is selectable through register. Default is 24MHz input.

Generated PME event.

PCI clock input.

Encoded DMA Request signal.

Serial IRQ input/Output.

These signal lines communicate address, control, and data

information over the LPC bus between a host and a peripheral.

Indicates start of a new cycle or termination of a broken cycle.

Reset signal. It can connect to PCIRST# signal on the host.

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