W83194BR-640 Просмотр технического описания (PDF) - Winbond

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W83194BR-640

166MHZ CLOCK FOR SIS CHIPSET

Winbond 

W83194BR-640

6.2.5 Register 8: Control Register (1 = Active, 0 = Inactive)

Bit @PowerUp Pin

7

X

23 Latched AGPSEL#

6

X

10 Latched FS3#

Description

5

X

9 Latched FS2#

4

X

3 Latched FS1#

3

X

2 Latched FS0#

2

1

- ACskew2 (AGP to CPU skew program bit)

1

0

- ACskew1 (AGP to CPU skew program bit)

0

0

- ACskew0 (AGP to CPU skew program bit)

6.2.6 Register 9: SDRAM Register(1 = Active, 0 = Inactive)

Bit @PowerUp Pin

Description

7

1

- Reserved

6

1

- CPUCLK1 Free-run Control 1=CPUCLK1 can stopped by

CPU_STOP# , 0= CPUCLK1 Free-run

5

1

- Reserved

4

X

- Latched AGP_STOP#

3

X

- Latched CPU_STOP#

2

X

- Latched PCI_STOP#

1

X

- Latched SDR_STOP#

0

X

- Latched PD#

6.2.7 Register 10: Watchdog Timer Register

Bit @PowerUp Pin

Description

7

0

- Enable Count 1 = start timer

0 = stop timer

6

X

- Second timeout status (READ ONLY)

5

0

- Second count 5

4

0

- Second count 4

3

0

- Second count 3

2

0

- Second count 2

1

0

- Second count 1

0

0

- Second count 0

- 11 -

Publication Release Date: April. 2001

Revision 1.0

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