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V62C18164096LL-85B Просмотр технического описания (PDF) - Mosel Vitelic Corporation

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V62C18164096LL-85B
Mosel-Vitelic
Mosel Vitelic Corporation  Mosel-Vitelic
V62C18164096LL-85B Datasheet PDF : 10 Pages
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MOSEL VITELIC V62C18164096
256K x 16, CMOS STATIC RAM
PRELIMINARY
Features
s High-speed: 85, 100 ns
s Ultra low CMOS standby current of 2µA (max.)
s Fully static operation
s All inputs and outputs directly TTL compatible
s Three state outputs
s Ultra low data retention current (VCC = 1.0V)
s Operating voltage: 1.8V – 2.3V
s Packages
– 48-Ball CSP BGA (8mm x 10mm)
Description
The V62C18164096 is a 4,194,304-bit static
random-access memory organized as 262,144
words by 16 bits. Inputs and three-state outputs are
TTL compatible and allow for direct interfacing with
common system bus structures.
Functional Block Diagram
A0
VCC
GND
A6
Row
1024 x 4096
Decoder
Memory Array
A7
A8
A9
I/O1
I/O16
Input
Data
Circuit
Column I/O
Column Decoder
UBE
LBE
OE
WE
CE1
CE2
Control
Circuit
Device Usage Chart
Operating Temperature
Range
0°C to 70°C
–40°C to +85°C
Package Outline
B
A10
Access Time (ns)
85
100
A17
Power
L
LL
Temperature
Mark
Blank
I
V62C18164096 Rev. 1.2 June 2000
1

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