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UPD78323GJ(A1)-5BJ Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD78323GJ(A1)-5BJ
NEC
NEC => Renesas Technology NEC
UPD78323GJ(A1)-5BJ Datasheet PDF : 86 Pages
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µPD78323, 78324
DIFFERENCES BETWEEN µPD78324 AND 78323
Item
Product Name
Internal ROM
µPD78324
32K bytes
µPD78323
None
I/O line
Input
Input
/output
16 (dual-function as analog input: 8)
39
21
Port 4
(P40 to P47)
Specifiable as I/O as an 8-bit unit.
Functions as multiplexed address/data buses
(AD0 to AD7) in the external memory expansion
mode.
Functions always as multiplexed address/data
buses.
Port 5
(P50 to P57)
Specifiable as I/O bit-wise.
Functions as address bus (A8 to A15) in the
external memory expansion mode.
Functions always as address bus.
Port 9
(P90 to P93)
Memory expansion
mode register (MM)
Port 5 mode register
(PM5)
Specifiable as I/O bit-wise.
In the external memory expansion mode, P90
and P91 function as RD strobe signal output
and WR strobe signal output, respectively. In
the external memory high-speed fetch mode,
P92 P93 function as TAS output and TMD out-
put respectively.
Port 4 I/O mode is set as an 8-bit unit .
Port 5 I/O mode is set bit-wise.
Always P90 and P91 function as RD strobe and
WR strobe signal output, respectively.
In the µPD78324 emulation mode, turbo acces
acces manager (µPD71P301)Note PA and PB pins
are controlled as port 4 and port 5 emulation
pins.
Note Maintenance product
7

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