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UPD780964 Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD780964
NEC
NEC => Renesas Technology NEC
UPD780964 Datasheet PDF : 42 Pages
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µPD780016Y, 780018Y
ORDERING INFORMATION
Part Number
µPD780016YGF-XXX-3BA
µPD780018YGF-XXX-3BA
Package
100-pin plastic QFP (14 × 20 mm)
100-pin plastic QFP (14 × 20 mm)
Remark XXX indicates ROM code suffix.
78K/0 SERIES DEVELOPMENT
These products are a further development in the 78K/0 Series. The designations appearing inside the boxes are
subseries names.
78K/0
series
Under mass production
For control
100-pin µPD78078
100-pin
100-pin
80-pin
80-pin
64-pin
µPD78070A
µPD780018Note
µPD78058F
µPD78054
µPD780034
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
42/44-pin
µPD780024
µPD780964
µPD780924
µPD78014H
µPD78018F
µPD78014
µPD780001
µPD78002
µPD78083
µPD78078Y
µPD78070AY
µ PD780018YNote
µPD78058FY
µPD78054Y
µPD780034Y
µ PD780024Y
µPD78018FY
µPD78014Y
µPD78002Y
Under development
Y subseries supports I2C bus.
Timer added to the µPD78054, external interface functions enhanced
ROM-less product for the µPD78078
Enhanced serial I/O of the µPD78078, functions limited
Reduced EMI noise product of the µPD78054
UART and D/A added to the µPD78014, enhanced I/O
Enhanced A/D of the µPD780024
Enhanced serial I/O of the µPD78018F. Reduced EMI noise product.
Enhanced A/D of the µPD780924
Internal inverter control circuit and UART. Reduced EMI noise product.
Reduced EMI noise of the µPD78018F.
Low-voltage (1.8 V) operation product of the µPD78014, ROM, RAM variations enhanced
A/D, 16-bit timer added to the µPD78002
A/D added to the µPD78002
Basic subseries for control
Internal UART, low-voltage (1.8 V) operation possible
For driving FIPTM
100-pin
80-pin
64-pin
µPD780208
µPD78044F
µPD78024
I/O, FIP C/D of the µPD78044F enhanced, display output total: 53
6-bit U/D counter added to the µPD78024, display output total: 34
Basic subseries for FIP driving, display output total: 26
For driving LCD
100-pin
100-pin
100-pin
µPD780308
µPD78064B
µPD78064
µPD780308Y
µPD78064Y
Supporting IEBusTM
80-pin
µPD78098
For LV
64-pin µPD78P0914
Note Under planning
Enhanced SIO of the µPD78064, ROM, RAM extended
Reduced EMI noise product of the µPD78064
Basic subseries for LCD driving, internal UART
IEBus controller added to the µPD78054
PWM output, internal LV digital code decoder, Hsync counter
2

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