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TW9903

Multi-standard Video Decoder With High Quality Down Scaler

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TW9903

Output Interface

TW9903

HSYNC

VSYNC

HACTIVE

VACTIVE

DVALID

MPOUT

VCLK

FIELD

CBFLAG

CLKX1, CLKX2

OE#

VD[15:0]

Figure 2. TW9903 Video Data Output Interface

The TW9903 supports a synchronous 8-bit or 16-bit YCbCr 4:2:2 data output stream. The interface

consists of VD [15:0], HSYNC, VSYNC, HACTIVE, VACTIVE, DVALID, MPOUT, VCLK, FIELD,

CBFLAG, and OE# as shown in Figure 2. In 8-bit output mode, Reg0x03[6] is “0”.In 16-bit output

mode,Reg0x03[6] is “1”.

The TW9903 outputs all pixel data and control signals synchronous with CLKX2 rising edge for

both the 8-bit format and the 16bit format.

The mapping of video data stream formats is shown in Table 2. When the output is configured for a

8-bit format, the data is output on pins VD[15:8] with 8 bits of chrominance data preceding 8 bits of

luminance data for each pixel output. The data output is synchronous to the rising edge of CLKX2.

When the output si configured for a 16 -bit format, the luminance data is output on VD[15:8], and

the chrominance data is output on VD[7:0]. In 16-bit mode, the data output is synchronous with the

rising edge of CLKX2 and VD[15:0] data changes when CLKX1 goes high. Figure3a shows 8-bit

video data output timing. Figure3b shows 16-bit video data output timing.

TECHWELL, INC.

11

REV. 0.92 ( B )

06/02/2002

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