TSL2580, TSL2581
LIGHT-TO-DIGITAL CONVERTER
TAOS098 − MARCH 2010
Control Register (00h)
The CONTROL register primarily used to power the TSL258x device up and down as shown in Table 4.
Table 4. Control Register
Bit : 7
Address
00h
Resv
FIELD
BIT
Resv
7:6
ADC_INTR
5
ADC_VALID
4
Resv
3
Resv
2
ADC_EN
1
POWER
0
6
5
4
3
2
1
0
Resv ADRCe_sINvTR ADC_VALID Resv
Resv ADC_EN POWER
Reset
00h
DESCRIPTION
Reserved. Write as 0.
ADC Interrupt. Read only. Indicates that the device is asserting an interrupt.
ADC Valid. Read only. Indicates that the ADC channel has completed an integration cycle.
Reserved. Write as 0.
Reserved. Write as 0.
ADC Enable. This field enables the two ADC channels to begin integration. Writing a 1 activates the ADC
channels, and writing a 0 disables the ADCs.
Power On. Writing a 1 powers on the device, and writing a 0 turns it off.
NOTE: ADC_EN and POWER must be asserted before the ADC changes will operate correctly. After POWER is asserted, a 2-ms delay is
required before asserting ADC_EN.
NOTE: The TSL258x device registers should be configured before ADC_EN is asserted.
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Copyright E 2010, TAOS Inc.
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