TSL2562, TSL2563
LOW-VOLTAGE
LIGHT-TO-DIGITAL CONVERTER
TAOS066N − AUGUST 2010
AC Electrical Characteristics, VDD = 3 V, TA = 255C (unless otherwise noted)
PARAMETER†
TEST CONDITIONS
MIN
t(CONV)
Conversion time
12
Clock frequency (I2C only)
0
f(SCL)
Clock frequency (SMBus only)
10
t(BUF)
Bus free time between start and stop condition
1.3
Hold time after (repeated) start condition. After
t(HDSTA)
this period, the first clock is generated.
0.6
t(SUSTA)
Repeated start condition setup time
0.6
t(SUSTO)
Stop condition setup time
0.6
t(HDDAT)
Data hold time
0
t(SUDAT)
Data setup time
100
t(LOW)
SCL clock low period
1.3
t(HIGH)
SCL clock high period
0.6
t(TIMEOUT) Detect clock/data low timeout (SMBus only)
25
tF
Clock/data fall time
tR
Clock/data rise time
Ci
Input pin capacitance
† Specified by design and characterization; not production tested.
TYP
100
MAX
400
400
100
UNIT
ms
kHz
kHz
μs
μs
μs
μs
0.9 μs
ns
μs
μs
35 ms
300 ns
300 ns
10 pF
Copyright E 2010, TAOS Inc.
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