IDT723614L20(2002) Просмотр технического описания (PDF) - Integrated Device Technology
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IDT723614L20
(Rev.:2002)
(Rev.:2002)
Integrated Device Technology
IDT723614L20 Datasheet PDF : 32 Pages
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IDT723614 CMOS SYNCBIFIFO™ WITH BUS-MATCHING
AND BYTE SWAPPING 64 x 36 x 2
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
CLKB
EFB
CSB
HIGH
W/RB
ENB
SW1,
SW0
BE
SIZ1,
SIZ0
PGB,
ODD/
EVEN
ELnidttilaen-(2)
EndBiiagn-(2)
tSZS
tSZS
(0,1)
B0-B17
B18-B35
tENS
tSWS
tENH
tSWH
tSZH
tSZH
NOT (1,1) (1)
tPGS
(0,1)
tPGH
tEN
tA
Previous Data
tA
Previous Data
NOTES:
1. SIZ0 = HIGH and SIZ1 = HIGH selects the mail1 register for output on B0-B35.
2. Unused word B0-B17 or B18-B35 holds last FIFO1 output register data for word-size reads.
No Operation
NOT (1,1) (1)
tA
Read 1
tA
Read 1
tDIS
Read 2
tDIS
Read 2
3146 drw11
DATA SWAP TABLE FOR WORD READS FROM FIFO1
DATA WRITTEN TO FIFO1
A35-A27 A26-A18 A17-A9
A8-A0
A
B
C
D
A
B
C
D
A
B
C
D
A
B
C
D
SWAP MODE
SW1
SW0
L
L
L
H
H
L
H
H
READ
NO.
1
2
1
2
1
2
1
2
DATA READ FROM FIFO1
BIG-ENDIAN
B35-B27 B26-B18
A
B
C
D
D
C
B
A
C
D
A
B
B
A
D
C
LITTLE-ENDIAN
B17-B9 B8-B0
C
D
A
B
B
A
D
C
A
B
C
D
D
C
B
A
Figure 11. Port-B Word Read Cycle Timing for FIFO1
21
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