IDT723614L15(2002) Просмотр технического описания (PDF) - Integrated Device Technology

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IDT723614L15
(Rev.:2002)

CMOS SyncBiFIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

Integrated Device Technology 

IDT723614 CMOS SYNCBIFIFO™ WITH BUS-MATCHING

AND BYTE SWAPPING 64 x 36 x 2

CLKB

EFB HIGH

CSB

W/RB

ENB

SW1,

SW0

BE

SIZ1,

SIZ0

PGB,

ODD/

EVEN

B0-B35

tENS

tENH

tSWS

tSWH

tSZS

tSZH

tSZS

(0,0)

tSZH

NOT (1,1)(1)

tPGS

(0,0)

tPGH

tEN

tA

Previous Data

NOTES:

1. SIZ0 = HIGH and SIZ1 = HIGH selects the mail1 register for output on B0-B35.

2. Data read from FIFO1.

COMMERCIAL AND INDUSTRIAL

TEMPERATURE RANGES

tENS

tENH

No Operation

NOT (1,1)(1)

tA

W1(2)

tDIS

W2 (2)

3146 drw10

DATA SWAP TABLE FOR FIFO LONG-WORD READS FROM FIFO1

A35-27

A

A

A

A

DATA WRITTEN TO FIFO1

A26-A18

B

B

B

A17-A9

C

C

C

A8-A0

D

D

D

B

C

D

SWAP MODE

SW1

SW0

L

L

L

H

H

L

H

H

B35-27

A

D

C

B

DATA READ FROM FIFO1

B26-18

B

C

D

B17-B9

C

B

A

A

D

B8-B0

D

A

B

C

Figure 10. Port-B Long-Word Read Cycle Timing for FIFO1

20

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