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IDT72271L20TFB Просмотр технического описания (PDF) - Integrated Device Technology

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IDT72271L20TFB
IDT
Integrated Device Technology IDT
IDT72271L20TFB Datasheet PDF : 30 Pages
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IDT72261/72271 SyncFIFO
16,384 x 9, 32,768 x 9
MILITARY AND COMMERCIAL TEMPERATURE RANGES
In FWFT Mode, the Ouput Ready (OR) function is selected.
OR goes LOW at the same time that the first word written to an
empty FIFO appears valid on the outputs. OR goes HIGH one
cycle after RCLK shifts the last word from the FIFO memory
to the outputs. Then further data reads are inhibited until OR
goes LOW again.
When writing the first word to an empty FIFO, the assertion
time of OR is variable, and can be represented by the First
Word Latency parameter, tFWL2, which is measured from the
rising WCLK edge that writes the first word to the rising RCLK
edge that updates the flag. tFWL2 includes any delay due to
clock skew and can be expressed as follows:
tFWL2 max. = 10*Tf + 3*TRCLK (in ns)
where Tf is either the RCLK or the WCLK period, whichever is
shorter, and TRCLK is the RCLK period. Note that the First
Word Latency in FWFT mode is one RCLK cycle longer than
in IDT Standard mode. The tFWL2 delay determines how early
the first word can be available at Qn. This delay has no effect
on the reading of subsequent words.
EF/OR is sychronized to the RCLK. It is double-registered
to enhance metastable immunity.
PROGRAMMABLE ALMOST-FULL FLAG (PAF)
The Programmable Almost-Full Flag (PAF) will go LOW
when the FIFO reaches the Almost-Full condition as specified
by the offset m stored in the Full Offset register.
At the time of Master Reset, depending on the state of LD,
one of two possible default offset values are chosen. If LD is
TABLE I –– STATUS FLAGS FOR IDT STANDARD MODE
Number of Words in FIFO Memory (1)
72261
0
72271
0
FF PAF
H
H
HF PAE EF
H
L
L
1 to n (2)
1 to n(2)
H
H
H
L
H
(n+1) to 8,192
(n+1) to16,384
H
H
H
H
H
8,193 to (16,384-(m+1))
16,385 to (32,768-(m+1))
H
H
L
H
H
(16,384-m) to (3) 16,383
(32,768-m) to (3) 32,767
H
L
L
H
H
16,384
32,768
L
L
L
H
H
NOTES:
3097 tbl 03
1. Data in the output register does not count as a "word in FIFO memory". Since, in FWFT mode, the first word written to an empty FIFO goes unrequested
to the output register (no read operation necessary), it is not included in the FIFO memory count.
2. n = Empty Offset, Default Values: n = 127 when parallel offset loading is selected or n=1023 when serial offset loading is selected.
3. m = Full Offset, Default Values: m = 127 when parallel offset loading is selected or n=1023 when serial offset loading is selected.
TABLE II –– STATUS FLAGS FOR FWFT MODE
Number of Words in FIFO Memory (1)
72261
0
72271
0
IR PAF HF PAE OR
L
H
H
L
H (4)
1 to n(2)
(n+1) to 8,192
1 to n(2)
(n+1) to16,384
L
H
H
L
L
L
H
H
H
L
8,193 to (16,384-(m+1))
16,385 to (32,768-(m+1))
L
H
L
H
L
(16,384-m)(3) to 16,383
(32,768-m)(3) to 32,767
L
L
L
H
L
16,384
32,768
H
L
L
H
L
NOTES:
3097 tbl 04
1. Data in the output register does not count as a "word in FIFO memory". Since, in FWFT mode, the first word written to an empty FIFO goes unrequested
to the output register (no read operation necessary), it is not included in the FIFO memory count.
2. n = Empty Offset, Default Values: n = 127 when parallel offset loading is selected or n=1023 when serial offset loading is selected.
3. m = Full Offset, Default Values: m = 127 when parallel offset loading is selected or n=1023 when serial offset loading is selected.
4. Following a reset (Master or Partial), the FIFO memory is empty and OR = HIGH. After writing the first word, the FIFO memory remains empty, the data
is placed into the output register, and OR goes LOW. In this case, or any time the last word in the FIFO memory has been read into the output register;
a rising RCLK edge, enabled by REN, will set OR HIGH.
12

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