IDT6178S12Y Просмотр технического описания (PDF) - Integrated Device Technology

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IDT6178S12Y

CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM

Integrated Device Technology 

IDT6178S

CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM

TIMING WAVEFORM OF CLEAR CYCLE

CLR

WE

tCLPW

MILITARY AND COMMERCIAL TEMPERATURE RANGE

tWECL

tCLRC

2953 drw 11

POWER ON RESET TIMING

VCC

tPOCL

CLR

WE

tWECL

ORDERING INFORMATION

IDT 6178

S

XX

X

X

Device

Type

Power Speed Package Process/

Temperature

tCLRC

2953 drw 12

Blank Commercial (0°C to +70°C)

B

Military (–55°C to +125°C,

Compliant to MIL-STD-883, Class B)

P

300 mil Plastic DIP (P22-1)

Y

300 mil Small Outline, J bend (SO24-4)

D

300 mil Ceramic DIP (D22-1)

10

Commercial only

12

15

20

25

Speed in nanoseconds

2953 drw 13

11.1

7

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