IDT6178S12D Просмотр технического описания (PDF) - Integrated Device Technology

Номер в каталоге

Компоненты Описание

Список матч

IDT6178S12D

CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM

Integrated Device Technology 

IDT6178S

CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM

MILITARY AND COMMERCIAL TEMPERATURE RANGE

AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%, All Temperature Ranges)

6178S10(1)

6178S12

6178S15

Symbol

Parameter

Read Cycle

tRC Read Cycle Time

tAA Address Access Time

tOE Output Enable Access Time

tOH Output Hold from Address Change

tOLZ(2) Output Enable to Output in Low-Z Time

tOHZ(2) Output Disable to Output in High-Z Time

Min. Max. Min. Max. Min. Max.

10

—

12

—

15

—

—

10

—

12

—

15

—

7

—

8

—

10

3

—

3

—

3

—

2

—

2

—

2

—

—

6

—

7

—

9

NOTES:

1. 0°C to +70°C temperature range only.

2. This parameter guaranteed with AC load (Figure 3) by device characterization, but is not production tested.

6178S20/25

Min. Max. Unit

20/25

—

—

3

2

—

—

20/25

15

—

—

12

ns

ns

ns

ns

ns

ns

2953 tbl 11

TIMING WAVEFORM OF READ CYCLE NO. 1(1)

tRC

ADDRESS

tAA

OE

tOE

tOLZ (3)

DATAOUT

tOH

tOHZ (3)

DATAOUT VALID

TIMING WAVEFORM OF READ CYCLE NO. 2(1,2)

tRC

ADDRESS

tAA

tOH

DATAOUT

PREVIOUS DATAOUT VALID

NOTES:

1. WE is HIGH for Read Cycle.

2. Output enable is continuously active, OE is LOW.

3. Transition is measured ±200V from steady state.

tOH

DATAOUT VALID

2953 drw 08

DATAOUT

VALID

2953 drw 09

11.1

5

Share Link: