TC58NS256DC Просмотр технического описания (PDF) - Toshiba

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TC58NS256DC

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

Toshiba 

TC58NS256DC

(7) RY/BY : termination for the Ready/Busy pin ( RY/BY )

A pull-up resistor needs to be used for termination because the RY/BY buffer consists of an open drain

circuit.

VCC

VCC

Device

Ready

R

3.0 V

RY/BY

CL

VCC

1.0 V

tf

Busy

1.0 V

3.0 V

tr

VSS

Figure 19.

1.5 µs

tr 1.0 µs

This data may vary from device to device.

We recommend that you use this data as a reference

when selecting a resistor value.

0.5 µs

0

tf

tr

VCC = 3.3 V

Ta = 25°C

15 ns

CL = 100 pF

10 ns tf

5 ns

1 KΩ 2 KΩ 3 KΩ 4 KΩ

R

(8) Status after power-on

The following sequence is necessary because some input signals may not be stable at power-on.

Power on

FF

Reset

Figure 20.

(9) Power-on/off sequence:

The WP signal is useful for protecting against data corruption at power-on/off. The following timing

sequence is necessary:

0V

CE , WE , RE

CLE, ALE

WP

3.0 V

2.8 V

VCC

Don’t

care

VIL

VIH

Operation

Figure 21. Power-on/off Sequence

Don’t

care

VIL

2000-08-27 27/33

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