STV7733
1
Block diagram
Block diagram
Figure 2. STV7733 block diagram
DIR
/CS
SCLK
VDD
DBA1
DBA2
DBB1
DBB2
DBC1
DBC2
DBD1
DBD2
/DL
AOC1
AOC2
POE
HVDD
MVDD
VSSP
2 x 80-bit shift register
2 x 80-bit shift register
2 x 80-bit shift register
2 x 80-bit shift register
Q1 Q2 Q3 Q4
Q320
2 x 320-bit latch
Output control
Tri-level output buffer stage
VSSL
STBTEST
OE
VSSS
HVDD
MVDD
VSSP
OUT1 OUT2
OUT320
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