MRFIC0903 Просмотр технического описания (PDF) - Motorola => Freescale
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MRFIC0903 Datasheet PDF : 8 Pages
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TYPICAL CHARACTERISTICS
2
18
VDD = 5 Vdc
85°C
Pin = 4 dBm
1.5
85°C
16
TA = 25°C
14
– 35°C
1
TA = 25°C
12
0.5
– 35°C
0
100
600
1100
160
210
f, FREQUENCY (MHz) 0
0
Figure 15. Insertion Loss versus Frequency
10
8
100
VDD = 5 Vdc
Pin = 4 dBm
600
1100
160
210
f, FREQUENCY (MHz) 0
0
Figure 16. Input Return Loss
versus Frequency
APPLICATIONS INFORMATION
DESIGN INFORMATION
The MRFIC0903 SPDT antenna switch was designed for
low cost, flexibility and ease of use. This is accomplished by
its internal topology that allows control of the switch through
its TTL/CMOS compatible (0 to VDD) control pins. Operating
on a single positive supply, the switch was designed for a
minimum supply voltage, minimum power consumption and
low current TTL/CMOS compatible control signals.
THEORY OF OPERATION
The MRFIC0903 can be used as a transmit and receive or
antenna diversity switch in the frequency range from
100 MHz to 2 GHz with incident power levels as high as
4 watts.
The frequency behavior can be optimized by resonating
the DC blocking capacitor’s position and value with the para-
sitic inductance of the package lead. Operation from 300
MHz to 1.6 GHz can be optimized with a high Q 100 pF
blocking capacitor. For the higher frequency band from 1.6
GHz to 2.0 GHz, a 8.2 pF capacitor is suggested. Further im-
provements can be achieved by resonating the inductance of
VDD, VC1, and VC2 pins with the appropriate capacitor val-
ues.
The power handling capability and linearity of the
MRFIC0903 is dependent only on the supply voltage. With a
3 V supply, the device handles 1.25 W (1.6 W PEP) of
incident power while maintaining good linearity and low
harmonic distortion. The power transmitting capability in-
creases to 3 W of incident power with a 5 V supply and up to
4 W with a 7.5 V supply.
Due to the device’s inherently low harmonic distortion, the
switch requires little harmonic filtering at its outputs. It also
has a high reverse third–order intercept point for use in non–
TDMA antenna diversity applications (analog cellular sys-
tems).
BIASING CONSIDERATIONS
The MRFIC0903 is based on a floating “cold FET” topolo-
gy. With this topology, the differential voltage between VC1
and VC2 dictates the power handling capability. For exam-
ple, the device’s power handling capability is the same with
the device biased with 5 V at VC1 and 0 V at VC2, with 0 V at
VC1 and –5 V at VC2, or with 3 V at VC1 and – 2 V at VC2.
POSSIBLE APPLICATIONS
The MRFIC0903 can be used in a number of cellular and
cordless phone applications. The part is applicable for ana-
log cellular phones in systems such as AMPS, TACS,
NAMPS, ETACS and NMT900; for digital cellular phones in
systems such as GSM, PDC, DAMPS, DCS1800, PCS and
NADC; and for cordless phones in systems such as DECT,
PHS, ISM, CT1 and CT2. In general it can fit into any applica-
tion where high power handling capability is required for
frequencies ranging from 100 MHz to 2 GHz.
EVALUATION BOARDS
Evaluation boards are available for RF Monolithic Inte-
grated Circuits by adding a “TF” suffix to the device type.
For a complete list of currently available boards and ones
in development for newly introduced product, please con-
tact your local Motorola Distributor or Sales Office.
MRFIC0903
6
MOTOROLA RF DEVICE DATA
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