IDT723612L20PQFI Просмотр технического описания (PDF) - Integrated Device Technology

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IDT723612L20PQFI

CMOS SyncBiFIFO™ 64 x 36 x 2

Integrated Device Technology 

IDT723612

CMOS SYNCBiFIFOTM 64 x 36 x 2

COMMERCIAL AND INDUSTRIAL

TEMPERATURE RANGES

CLKA

CSA

W/RA

MBA

ENA

A0 - A35

CLKB

MBF1

CSB

W/RB

MBB

ENB

B0 - B35

tENS1

tENS1

tENS1

tENS1

tDS

W1

tENH1

tENH1

tENH1

tENH1

tDH

tPMF

tPMF

tENS2

tENH2

tEN

tMDV

tPMR

tDIS

W1 (Remains valid in Mail1 Register after read)

FIFO1 Output Register

3136 drw18

NOTE:

1. Port-B parity generation off (PGB = LOW).

Figure 15. Timing for Mail1 Register and MBF1 Flag

21

FEBRUARY 13, 2009

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