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IDT723612L30PQF Просмотр технического описания (PDF) - Integrated Device Technology

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IDT723612L30PQF
IDT
Integrated Device Technology IDT
IDT723612L30PQF Datasheet PDF : 25 Pages
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IDT723612
CMOS SYNCBiFIFOTM 64 x 36 x 2
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
CLKB
tENS2
tENH2
ENB
CLKA
AEA
tSKEW2(1)
1
X Words in FIFO2
2
tPAE
tPAE
(X+1) Words in FIFO2
tENS2
tENH2
ENA
3136 drw15
NOTES:
1. tSKEW2 is the minimum time between a rising CLKB edge and a rising CLKA edge for AEA to transition HIGH in the next CLKA cycle. If the time between the rising
CLKB edge and rising CLKA edge is less than tSKEW2, then AEA may transition HIGH one CLKA cycle later than shown.
2. FIFO2 Write (CSB = LOW, W/RB = HIGH, MBB = LOW), FIFO2 read (CSA = LOW, W/RA = LOW, MBA = LOW).
Figure 12. Timing for AEA when FIFO2 is Almost Empty
CLKA
ENA
AFA
tENS2
tENH2
tPAF
[64-(X+1)] Words in FIFO1
tSKEW2(1)
1
(64-X) Words in FIFO1
2
tPAF
CLKB
ENB
tENS2
tENH2
3136 drw16
NOTES:
1. tSKEW2 is the minimum time between a rising CLKA edge and a rising CLKB edge for AFA to transition HIGH in the next CLKA cycle. If the time between the rising
CLKA edge and rising CLKB edge is less than tSKEW2, then AFA may transition HIGH one CLKB cycle later than shown.
2. FIFO1 Write (CSA = LOW, W/RA = HIGH, MBA = LOW), FIFO1 read (CSB = LOW, W/RB = LOW, MBB = LOW).
Figure 13. Timing for AFA when FIFO1 is Almost Full
COMMERCIAL AND INDUSTRIAL
CLKB
ENB
AFB
CLKA
tENS2
tENH2
tPAF
[64-(X+1)] Words in FIFO2
ENA
tENS2
tSKEW2(1)
1
(64-X) Words in FIFO2
tENH2
2
tPAF
3136 drw17
NOTES:
1. tSKEW2 is the minimum time between a rising CLKB edge and a rising CLKA edge for AFB to transition HIGH in the next CLKB cycle. If the time between the rising
CLKB edge and rising CLKA edge is less than tSKEW2, then AFB may transition HIGH one CLKA cycle later than shown.
2. FIFO2 Write (CSB = LOW, W/RB = HIGH, MBB = LOW), FIFO2 read (CSA = LOW, W/RA = LOW, MBA = LOW).
Figure 14. Timing for AFB when FIFO2 is Almost Full
20
FEBRUARY 13, 2009

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