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IDT723612L15PQF(1997) Просмотр технического описания (PDF) - Integrated Device Technology

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IDT723612L15PQF
(Rev.:1997)
IDT
Integrated Device Technology IDT
IDT723612L15PQF Datasheet PDF : 29 Pages
First Prev 21 22 23 24 25 26 27 28 29
IDT723612 BiCMOS SyncBiFIFO
64 x 36 x 2
CLKA
ENA
AFA
tENS2
tENH2
tPAF
[64-(X+1)] Words in FIFO1
(1)
tSKEW2
1
(64-X) Words in FIFO1
COMMERCIAL TEMPERATURE RANGE
2
tPAF
CLKB
ENB
tENS2
tENH2
3136 drw 15
Notes:
1. tSKEW2 is the minimum time between a rising CLKA edge and a rising CLKB edge for AFA to transition HIGH in the
next CLKA cycle. If the time between the rising CLKA edge and rising CLKB edge is less than tSKEW2, then AFA may
transition HIGH one CLKB cycle later than shown.
2. FIFO1 Write (CSA = LOW, W/RA = HIGH, MBA = LOW), FIFO1 read (CSB = LOW, W/RB = LOW, MBB = LOW).
Figure 12. Timing for AFA when FIFO1 is Almost Full
CLKB
ENB
AFB
tENS2
tENH2
tPAF
[64-(X+1)] Words in FIFO2
(1)
tSKEW2
1
(64-X) Words in FIFO2
2
tPAF
CLKA
ENA
tENS2
tENH2
3136 drw 16
Notes:
1. tSKEW2 is the minimum time between a rising CLKB edge and a rising CLKA edge for AFB to transition HIGH in the
next CLKB cycle. If the time between the rising CLKB edge and rising CLKA edge is less than tSKEW2, then AFB may
transition HIGH one CLKA cycle later than shown.
2. FIFO2 Write (CSB = LOW, W/RB = HIGH, MBB = LOW), FIFO2 read (CSA = LOW, W/RA = LOW, MBA = LOW).
Figure 13. Timing for AFB when FIFO2 is Almost Full
22

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