IDT71B74S10TP Просмотр технического описания (PDF) - Integrated Device Technology
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IDT71B74S10TP Datasheet PDF : 9 Pages
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IDT71B74
BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM
PIN CONFIGURATION
RESET
A 12
A7
A6
A5
A4
A3
A2
A1
A0
I/O 0
I/O 1
I/O 2
GND
1
28
2
27
3
26
4
25
5 P28-2 24
6 SO28-5 23
7
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
V CC
WE
MATCH
A8
A9
A 11
OE
A 10
CS
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
DIP/SOJ
TOP VIEW
3013 drw 02
COMMERCIAL TEMPERATURE RANGE
TRUTH TABLE(1, 2)
WE CS OE RESET MATCH I/O
Function
XXX
L
HIGH — Reset all bits to LOW
XHX
H
HIGH Hi-Z
Deselect chip
HLH
H
LOW DIN
No MATCH
HLH
H
HIGH DIN
MATCH
HL L
H
HIGH DOUT
Read
LLX
H
HIGH DIN
Write
NOTES:
3013 tbl 01
1. H = VIH, L = VIL, X = DON'T CARE
2. HIGH = High-Z (pulled up by an external resistor), and LOW = VOL.
PIN DESCRIPTIONS
Pin Names
A0–12
I/O0-7
CS
RESET
MATCH
WE
OE
GND
VCC
Description
Address
Data Input/Output
Chip Select
Memory Reset
Data/Memory Match (Open Drain)
Write Enable
Output Enable
Ground
Power
3013 tbl 02
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
Com’l.
Unit
VTERM(2)
TA
Terminal Voltage with
Respect to GND
Operating Temperature
–0.5 to +7.0 V
0 to +70
°C
TBIAS
Temperature Under Bias
–55 to +125 °C
TSTG
Storage Temperature
–55 to +125 °C
PT
Power Dissipation
1.0
W
IOUT
DC Output Current
50
mA
NOTES:
3013 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VTERM must not exceed VCC + 0.5V.
CAPACITANCE
(TA = +25°C, f = 1.0MHz, SOJ Package)
Symbol
Parameter(1)
Conditions
Max. Unit
CIN
Input Capacitance
VIN = 3dV
6 pF
COUT Output Capacitance
VOUT = 3dV 7 pF
NOTE:
3013 tbl 04
1. This parameter is determined by device characterization, but is not
production tested.
14.1
2
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