ICS9248F-168-T Просмотр технического описания (PDF) - Integrated Circuit Systems
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ICS9248F-168-T Datasheet PDF : 14 Pages
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ICS9248-168
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
Bit
Bit 2,
Bit 7:4
Bit 3
Bit 1
Bit 0
Description
Bit Bit Bit Bit Bit CPUCLK
PCICLK
27654
(MHz)
(MHz)
00000
100.00
33.33
0000 1
133.33
33.33
000 10
100.00
33.33
000 11
133.33
33.33
00 100
100.00
33.33
00 10 1
133.33
33.33
00 110
90.00
30.00
00 111
120.00
30.00
0 1000
100.30
33.43
0 100 1
133.73
33.43
0 10 10
100.30
33.43
0 10 11
133.73
33.43
0 1100
101.00
33.67
0 110 1
134.66
33.67
0 1110
102.00
34.00
0 1111
136.00
34.00
10 0 0 0
103.00
34.33
1000 1
137.33
34.33
100 10
104.00
34.67
100 11
138.66
34.67
10 100
105.00
35.00
10 10 1
140.00
35.00
10 110
107.00
35.67
10 111
142.66
35.67
1 10 0 0
110.00
36.67
1100 1
146.66
36.67
110 10
115.00
38.33
110 11
153.33
38.33
1 1 10 0
100.00
33.33
1110 1
133.33
33.33
1 1 1 10
100.00
33.33
11111
133.33
33.33
0 - Frequency is selected by hardware select, Latched Inputs
1 - Frequency is selected by Bit 2, 7:4
0 - Normal
1 - Spread Spectrum Enabled ±0.25% Center Spread
0 - Running
1- Tristate all outputs
Spread
Precentage
+/- 0.35% Center Spread
+/- 0.35% Center Spread
0 to - 0.5% Down Spread
0 to - 0.5% Down Spread
+/- 0.6% Center Spread
+/- 0.6% Center Spread
+/- 0.25% Center Spread
+/- 0.25% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.60% Center Spread
+/- 0.60% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.35% Center Spread
+/- 0.50% Center Spread
+/- 0.50% Center Spread
0 to -1.0% Down Spread
0 to -1.0% Down Spread
Note: Default at power-up will be for latched logic inputs to define frequency, as displayed by Bit 3.
PWD
Reserved
00101
0
1
0
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