CS8415A-IS Просмотр технического описания (PDF) - Cirrus Logic
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CS8415A-IS Datasheet PDF : 42 Pages
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CS8415A
16.2.4 Component Value Selection
The external PLL component values are listed in
Table 4.
Fs Range RFILT (kΩ) CFILT (µF) CRIP (nF) PLL Lock Time (ms)
8 - 96 0.909
1.8
33
56
32 - 96
3.0
0.047
2.2
60
Table 4. External PLL Component Values
16.2.5 Jitter Attenuation
Shown in Figure 19 is the jitter attenuation plot
when used with the 36-96kHz PLL component val-
ues. The AES3 and IEC60958-4 specifications
state a maximum of 2dB jitter gain or peaking.
5
0
−5
−10
−15
−20
10−1
100
101
102
103
104
105
Jitter Frequency (Hz)
Figure 19. Jitter Attenuation Characteristics of PLL with Fs=32 to 96 kHz Filter Components
42
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