HD64F7065AF Просмотр технического описания (PDF) - Renesas Electronics

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HD64F7065AF

Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7000 Series

Renesas Electronics 

Contents

Section 1 Overview ............................................................................................................. 1

1.1 Features of SH7065........................................................................................................... 1

1.2 Block Diagram .................................................................................................................. 8

1.3 Pin Arrangement and Pin Functions.................................................................................. 9

1.3.1 Pin Arrangement .................................................................................................. 9

1.3.2 Pin Functions ....................................................................................................... 10

Section 2 CPU ...................................................................................................................... 21

2.1 Register Configuration ...................................................................................................... 21

2.1.1 General Registers ................................................................................................. 21

2.1.2 Control Registers.................................................................................................. 23

2.1.3 System Registers .................................................................................................. 26

2.1.4 DSP Registers ...................................................................................................... 27

2.1.5 Notes on Guard Bits and Overflow Treatment..................................................... 30

2.1.6 Initial Register Values.......................................................................................... 31

2.2 Data Formats ..................................................................................................................... 32

2.2.1 Register Data Formats.......................................................................................... 32

2.2.2 Memory Data Formats ......................................................................................... 32

2.2.3 Immediate Data Formats ...................................................................................... 33

2.2.4 DSP Type Data Formats ...................................................................................... 33

2.2.5 DSP Type Instructions and Data Formats ............................................................ 35

2.3 Features of CPU Core Instructions.................................................................................... 40

2.4 Instruction Formats ........................................................................................................... 43

2.4.1 CPU Instruction Addressing Modes..................................................................... 43

2.4.2 DSP Data Addressing........................................................................................... 47

2.4.3 CPU Instruction Formats...................................................................................... 54

2.4.4 DSP Instruction Formats ...................................................................................... 57

2.5 Instruction Set ................................................................................................................... 63

2.5.1 CPU Instruction Set ............................................................................................. 63

2.5.2 DSP Data Transfer Instruction Set ....................................................................... 79

2.5.3 DSP Operation Instruction Set ............................................................................. 83

2.6 Usage Note........................................................................................................................ 96

Section 3 Operating Modes............................................................................................... 99

3.1 Operating Mode Selection................................................................................................. 99

3.1.1 Operating Modes.................................................................................................. 101

3.1.2 Pin Configuration................................................................................................. 102

3.1.3 Register Configuration ......................................................................................... 102

Rev. 5.00 Sep 11, 2006 page ix of xxii

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